1. FIELD OF THE INVENTION
The present invention relates to the field of computer systems. More specifically, the present invention relates to the art of detecting supply power loss to prevent unpredictable component behavior.
2. DESCRIPTION OF RELATED ART
Digital systems are sensitive to power supply perturbations. Momentary losses of power or sags in line voltage, otherwise known as voltage brownouts, can cause unpredictable behavior in digital systems. When the supply voltage in a digital system sage below a valid level, but not completely to zero before being restored, a digital state machine can transition to an invalid state, thus causing the unpredictable behavior.
To ensure proper operation following a brownout event, digital systems typically include power loss detection and reset signal generation circuitry. One known method for detecting power supply loss includes using the power supply voltage, an RC delay and a logic gate. In cases where the brownout is a voltage sag that dips below a valid level for the system, but not all the way to zero, such circuitry can malfunction, thus compromising system integrity. One reason for such a malfunction is that the perturbation in the power supply voltage often affects the supply voltage of the logic gate, thus affecting the voltage at which the gate activates, preventing the gate from functioning properly. A second known method for detecting power supply loss entails the use of a voltage reference device and a threshhold detection circuit. This implementation is cost prohibitive for many applications, particularly when implemented at the circuit board level.
The present invention is directed to overcoming, or at least reducing the effects of, one or more of the problems set forth above by providing a novel and nonobvious low-cost method and apparatus for detecting power supply perturbations and asserting a reset signal.